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Connect the Dots: Designing for the Future of Manufacturing Reality—Strip-Etch-Strip

The demand for ultra-high density interconnect (UHDI) PCBs is growing as electronic devices become increasingly advanced. That means we will be creating more designs that need to align with the reality of manufacturing UHDI boards.

My last column on this subject focused on plating, and we are ready to discuss the strip-etch-strip (SES) process. With UHDI boards, footprints are smaller and tolerances are tighter. Your big design challenge associated with the SES process involves trace width and spacing control. The etching process can undercut traces and alter their final size.

Before I get to design best practices, this is how the SES process works. Having just completed pattern plating, we have: 

1. Laminated all the internal layers together.
2. Drilled the through-holes.
3. Made the through-holes conductive in the electroless copper process.
4. Applied the image to the external layers through photoresist.
5. Plated the copper in those channels to beef up the copper thickness for traces, pads, and through-holes.
6. Added a layer of electrolytic tin over the top of that copper to protect it during subsequent stages of production.

After the tin plating, the circuit image on our panel is a silvery matte color. Areas without copper are blueish or purple in color, including channels on the board. Those blueish-purple areas mark photoresist areas. The next step in production begins with removing the photoresist. 

Stripping Away Photo-resist
Photoresist is acidic in nature, so we submerge the panels and spray them with an alkaline solution to dissolve it. It risks the overall finished product if the stripping process is not completed correctly. During pattern plating, it was possible to plate over the top of the resist. Over-plating creates a mushroom cap on the photoresist, reducing the spacing between conductors and creating a much smaller gap to remove photoresist from the channels. This can cause electrical shorts. 

Both issues can make it harder to get the photoresist out from underneath the mushroom cap, making it more likely that some of the photoresist hangs onto the panel and potentially creates issues with board functionality down the road.

If resist remains on the board, it’s more difficult to etch out the copper underneath, potentially creating shorts or signal issues. Not removing all the copper we intended can lead to dire impacts to board performance, so it’s important to inspect the panels after they exit the solution. Any remaining photoresist will stand out. The operator can perform the process again at an accelerated speed or pressure to wash away the unwanted resist.

Etching: Removing the Exposed Copper
Removing the copper under the photoresist will define the outer layer features we want to keep. Etching is yet another chemical process that uses a lot of spray pressure and continuous flooding of chemical solution over the panels. During this phase, we etch the copper down from the foil height to the laminate. As we etch down, we are also etching laterally underneath the tin toward the traces.

The etching chemical solution is highly reactive to the copper but mostly benign to other metals on the panel, so we don’t have to worry about damaging them during the process. Tin protects areas where we don’t want copper removed.

Etching is one of the most complex and artistic components of the manufacturing process, with many variables that can impact the process, including how fast the panels move through the solution, whether pressure washing was required, the chemical makeup of the solution, and its temperature. When running a panel through the process, especially with elements like impedance traces, the operator needs to accurately evaluate what comes out of the process. It takes experience and know-how to recognize when the etching process has been properly completed.

With isolated traces, potential for mushrooming, and the subtleties of etching, you can see how design and etching interact. Designers need not be experts on the etching process, but they should understand how it will respond to a design. It makes sense to design defensively and avoid potential pitfalls. I recommend visiting your fabricator to observe the SES process to see how they navigate the inherent variables.

Even though the process can be complex, SES typically goes off smoothly, but there are outliers. They can be design-related or a function of the manufacturing process. All is not lost if you’ve completed the process and didn’t get the desired outcome. If we’ve under-etched, we can correct the issue and recover the panels. However, over-etching usually leaves us with scrap.

The Second Strip in SES
In the second strip of the SES process, the panels go through another chemical stripping process, with a nitric acid-based solution that aggressively attacks and dissolves the tin. Copper reacts with nitric acid, but if the board is not left in the solution too long, the copper will be relatively unscathed.

If the tin is a conductor, why would we want to remove it? It’s because tin has a propensity in electronics to grow tin whiskers, dendritic growths that can cause failures over time. Leaving tin on the traces can wake a sleeping dragon and create issues with board function down the line. Tin or tin residue will also complicate the surface finish application.

Additional Design Best Practices
We’re now near the finish line. To avoid design-related issues, consider these design tips.

Prevent Photoresist From Hanging Onto Panel

Though it is mostly the fabricator’s responsibility to properly plate the panel and avoid over-plating, designers can help prevent this issue. Consider whether you are leaving enough space between the traces, how much copper is required inside the plated through-holes, and copper thickness on the surface. More copper increases the chances of over-plating and the dreaded mushroom cap. As a general rule, traces embedded through a ground plane are more difficult to strip and etch effectively. 

Avoid Spaces That Are Too Narrow 

Undercutting is the unwanted sideways etching of copper, removing it from beneath the protective resist layer. This can create a weakened, trapezoidal shape and affect signal integrity. Compensate for undercutting by utilizing an etch factor, meaning the traces on the film should be wider than the final required width.

Double Check Design Rule Checks

Don’t rely solely on design rule checks (DRC) to call out potential issues. For example, many DRCs do not look for large gaps between traces, instead focusing on the traces that are too close together, an especially critical issue for UHDI board designs. When the DRC ignores large gaps between traces, it often results in problems with crosstalk and signal integrity. Double check the designs themselves to ensure no large gaps between traces are present. 

Now we have a fully functioning circuit board and we’re almost ready to move on to pre-assembly, but oxygen and copper are not the best of friends. We must protect our boards during the next phase of production: applying solder mask and silk screen.

To learn more, check out I-Connect007’s On the Line with… podcast where we discussed the SES process in greater detail.

This column originally appeared in the February 2026 issue of I-Connect007 Magazine.