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Staying on Top of Signal Integrity Challenges
September 16, 2025 | Andy Shaughnessy, Design007 MagazineEstimated reading time: 1 minute
Over the years, Kris Moyer has taught a variety of advanced PCB design classes, both online IPC courses and in-person classes at California State University-Sacramento, where he earned his degrees in electrical engineering.
Much of his advanced curriculum focuses on signal integrity, so we asked Kris to discuss the trends he’s seeing in signal integrity today, the SI challenges facing PCB designers, and his go-to techniques for controlling or completely eliminating SI problems.
Andy Shaughnessy: Kris, your advanced design classes focus quite a bit on signal integrity. What SI issues are giving your students the most trouble today?
Kris Moyer: We actually cover signal integrity in all the IPC design courses except Introduction to PCB Design 1. Several SI issues come up in the classes fairly often. First is the problem of reflections and the associated overshoot and undershoot caused by impedance discontinuity in the transmission line design. The other issue that comes up quite frequently is how to design the power distribution system, including the selection of the decoupling capacitors to minimize the ground bounce/VCC bounce that happens during the switching events of modern digital systems.
Shaughnessy: Silicon geometries are likely to continue to keep shrinking. What effects do these shrinking features have on the PCB designer’s job?
Moyer: In my Professional Development course at APEX EXPO, I discuss that as silicon geometries of the devices continue to shrink, the rise/fall time of the digital signals will continue to get faster (decrease in time). This, in turn, will cause the frequency content in the square wave to increase. So, instead of the traditional 10–15 harmonics of the fundamental frequency we think of for traditional square waves, with these faster rise/fall times, we are now seeing harmonics of 50, 100, 200, or more of the fundamental frequency being necessary to create the sharp edge of the faster rise/fall times.
To continue reading this interview, which originally appeared in the September 2025 edition of Design007 Magazine, click here.
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Design for Test: A New Book from The Test Connection, Inc.
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Changing Times: Siemens Plans to Sell Former Mentor Graphics Wilsonville Campus
04/22/2026 | Nolan Johnson, I-Connect007Siemens announced it will be selling its Wilsonville, Oregon, property, which has served as the campus for Mentor Graphics, which was later acquired by German EDA-giant Siemens, as reported by The Oregonian on April 20. Siemens will maintain one building on the sprawling 53-acre campus, citing the move to hybrid and remote work over the past few years as a key factor in the decision.
Siemens Collaborates with TSMC to Advance AI for Semiconductor Design
04/22/2026 | SiemensSiemens announced the continuation of collaboration with TSMC to drive innovation in AI-powered automation and advanced semiconductor design enablement.
Standardization, Workforce, and the Road Ahead for Flex–Packaging Integration, Part 3
04/22/2026 | Anaya Vardya, American Standard CircuitsParts 1 and 2 of this series established the technical foundation and application landscape for the convergence of flexible PCBs and advanced semiconductor packaging. Part 3 addresses what comes next: the standards frameworks, talent pipelines, and strategic imperatives that will determine whether the industry can scale this convergence reliably and competitively.