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Beyond Design: Stackup Planning, Part 5

Design methodologies change over time, particularly in the ways to simulate electromagnetic fields and return current paths. In my previous column series on stackup planning, I described the traditional stackup structures that use a combination of signal and power/ground planes. But to achieve the next level in stackup design, one needs to not only consider the placement of signal and plane layers in the stackup but also visualize the electromagnetic fields that propagate the signals through the substrate. 

The four-part stackup planning column series was published over several months in 2015 in The PCB Design Magazine: 

• In Part 1, I looked at how the stackup is built, the materials used in construction, and the lamination process. And I set out some basic rules to follow for high-speed design. It is important to keep return paths, crosstalk, and EMI in mind during the design process. 

• Part 2 followed with definitions of basic stackups, starting with four and six layers. Of course, this methodology can be used for higher layer count boards (36 layers, 72 layers, and beyond). The virtual materials were replaced with items stocked by the PCB fabricator. 

• Part 3 examined higher layer count stackups as the four- and six-layer configurations are not the best choice for high-speed design. In particular, each signal layer should be adjacent to, and closely coupled to, an uninterrupted reference plane, which creates a clear return path and eliminates broadside crosstalk. As the layer count increases, these rules become easier to implement but decisions regarding return current paths become more challenging. More rules for HSD and EMI were also defined. 

• In Part 4, I elaborated on 10+ layer counts. The methodology I set out in previous columns can be used to construct higher layer count boards. In general, these boards contain more planes, and therefore, the issues associated with split power planes can usually be avoided. Also, 10+ layers require very thin dielectrics to reduce the total board thickness. This naturally provides tight coupling between the adjacent signal and plane layers, reducing crosstalk and electromagnetic emissions. Additional rules for high-speed design were defined. The number one question about determining the required layer count was also addressed.

In this month’s column, I will add to my stackup planning series with this final chapter (Part 5), covering all of the latest concepts in stackup design.

To read this entire column, which appeared in the July 2019 issue of Design007 Magazine, click here.