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SEMI ESD Alliance 2026 Outlook: Agentic AI to Transform Chip Design and Verification
May 1, 2026 | SEMIEstimated reading time: 1 minute
The Electronic System Design Alliance (ESD Alliance), a SEMI Technology Community, announced its annual Executive Outlook event for semiconductor EDA, agentic AI and IP company executives. This year’s panel will be held on Wednesday, June 10, at Cadence Design Systems’ headquarters in San Jose, Calif. beginning at 5:30 p.m. with networking and dinner, followed by a panel discussion at 6:30 p.m. Registration is open.
The theme “How Will Agentic AI Change Chip Design and Verification?” will guide featured EDA and emerging agentic AI company executives and entrepreneurs as they discuss changes within chip design and verification as agentic AI tools become more mainstream. Moderated by Ed Sperling, Semiconductor Engineering’s Editor in Chief, panelists will distill the excitement surrounding the innovation in chip design and verification, collaboration between traditional EDA and agentic AI startups and broader implications for technological advancements.
Panelists:
- Dave Kelf, CEO of Breker Verification Systems
- Cindy Cui, VP of Global Customer Success at ChipAgents
- Shelly Henry, CEO of Moores LabAI
- Ann Wu, CEO at Silimate
- Vince Wong, Head of AI Development at Verific Design Automation
Location:
Cadence Design Systems
2655 Seely Avenue
San Jose, CA 95134
Tickets for the event are free for SEMI/ESDA members and $40 per person for non-members.
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