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Beyond the Rulebook
What happens when the rule book is no longer useful, or worse, was never written in the first place? In today’s fast-moving electronics landscape, we’re increasingly asked to design and build what has no precedent, no proven path, and no tidy checklist to follow. This is where “Design for Invention” begins.
March Madness
From the growing role of AI in design tools to the challenge of managing cumulative tolerances, these articles in this issue examine the technical details, design choices, and manufacturing considerations that determine whether a board works as intended.
Looking Forward to APEX EXPO 2026
I-Connect007 Magazine previews APEX EXPO 2026, covering everything from the show floor to the technical conference. For PCB designers, we move past the dreaded auto-router and spotlight AI design tools that actually matter.
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Cadence, NVIDIA Launch Agentic AI Design Solutions
March 17, 2026 | BUSINESS WIREEstimated reading time: 5 minutes
Cadence announced an expansion of its broad collaboration with NVIDIA to accelerate Cadence’s Design for AI and AI for Design strategy. The next generation of agentic AI design solutions includes autonomous, long-running agents that require accelerated, trusted, physics-grounded engines to translate design intent into automated flows, generate designs and debug errors, and manage long, complex, end-to-end workflows. Cadence’s leadership in agentic AI is expanded by integrating its portfolio of industry-leading chip and system design solutions with NVIDIA’s accelerated computing stack.
“The fusion of agentic AI and physics-based design is transforming how the world’s most advanced chips are engineered,” said Anirudh Devgan, president and CEO of Cadence. “Through our expanded collaboration with NVIDIA, we’re bringing together Cadence’s expertise in agentic IC design and physics-driven optimization with NVIDIA’s accelerated computing to advance a new era of AI-driven chip innovation. Together, we’re enabling customers to design more intelligent, efficient silicon that will power the next generation of computing and AI infrastructure.”
“AI is driving the largest infrastructure buildout in history—spurring the creation of new chips, systems, and AI factories around the world,” said Jensen Huang, founder and CEO of NVIDIA. “Together, NVIDIA and Cadence have created the Cadence Millennium M2000—a revolutionary AI supercomputer built to tackle the immense scale and complexity of designing the world’s next generation of infrastructure.”
Broadest-Ever Portfolio of Accelerated Design Solutions
To give agents and engineers the tools they need, Cadence has expanded its design solutions accelerated with NVIDIA Grace CPUs and NVIDIA Blackwell GPUs—and as a turnkey deployment on the Cadence® Millennium™ M2000 Supercomputer—delivering up to 80X greater throughput and up to 20X lower power consumption. This expanded offering now spans analysis, optimization and design, with key solvers deeply optimized with NVIDIA CUDA-X. One example is the Cadence Clarity™ 3D Solver demonstrating that a Millennium M2000 system configured with 8X NVIDIA RTX pro 6000 GPU servers is up to 5X faster, or 4X better cost iso-performance, compared to an equivalent CPU-based solution, when extracting complex and large-scale designs.
Cadence accelerated solutions that will be available in 2026 include:
Electronic Design Automation (EDA): The industry’s leading place-and-route solution, Innovus™ Implementation System; chip, chiplet and 3D-IC analysis and optimization with Celsius™ Thermal Solver and Voltus™ IC Power Integrity Solution; advanced memory and circuit analysis with EMX® Planar 3D Solver and Liberate™ MX Memory Characterization; and Spectre® X Simulator and Quantus™ Field Solver for circuit analysis.
System Design Automation (SDA): Industry-leading advanced package and PCB optimization with the Allegro® X Design Platform, Clarity 3D Solver, Celsius EC Solver; system-level multiphysics analysis with Fidelity™ CFD Software; and Cadence MSC Actran™ for physical AI system analysis and optimization.
Life Sciences / Bio: ROCS X is an AI-enabled virtual screening solution that enables scientists to conduct 3D searches of over 200 trillion drug-like molecules. Target X is a physics-based AI solution that detects potential druggable pockets, achieving a success rate of over 90%.
The Cadence Allegro X Design Platform and the Cadence Reality™ Digital Twin Platform also integrate with NVIDIA Omniverse libraries for photo-realistic visualization, critical for multi-disciplinary engineering and design. Cadence’s MSC Virtual Test Drive™ (VTD) is being integrated with NVIDIA Cosmos and NVIDIA Omniverse NuRec for advancing the state of the art in physical AI.
Design for AI and AI for Design
Industry leaders use Cadence’s full suite of accelerated agentic solutions to design the next generation of AI infrastructure. The Cadence Reality Digital Twin Platform helps teams use physics-based models and AI to design and operate AI factories, accelerating deployment timelines and unlocking new revenue streams across the data center portfolio.
Cadence is advancing AI-driven engineering with its agentic AI solutions, led by the Cadence ChipStack™ AI Super Agent, to help engineers deliver higher quality, more complex designs. Cadence and NVIDIA are also collaborating on future agentic AI innovations in custom and analog design and building deep research and long-running agents for engineering NVIDIA NemoClaw, an open source stack that simplifies running OpenClaw always-on assistants, more safely, with a single command. As part of the NVIDIA Agent Toolkit, it installs the NVIDIA OpenShell runtime—a secure environment for running autonomous agents, and open source models like NVIDIA Nemotron.
From Silicon to Turbofan Engines, Customers Achieve the Previously Impossible
Cadence customers across semiconductors, automotive, aerospace and life sciences are using agentic AI, GPU-accelerated solutions and the Millennium M2000 Supercomputer to tackle design challenges that are not achievable with traditional approaches.
Honda is using Cadence Fidelity CFD Software, accelerated on the Millennium M2000 GB200 NVL72 system, to pursue time-accurate, full turbofan engine simulation—a grand challenge in computational fluid dynamics (CFD) previously impractical for routine design use.
"This capability opens the door to a more exploratory design methodology—one where our engineers can evaluate tradeoffs earlier and innovate with greater confidence as we develop the next generation of high-performance gas turbine engines," said Keiji Otsu, CEO, Honda R&D.
Micron is integrating GPU-accelerated Cadence design technologies and Cadence's agentic AI solution directly into its HBM memory design flow to accelerate iteration and maintain accuracy at leading-edge scale.
“As our HBM and next-generation memory designs grow in scale and complexity, reducing the cycle time for our most demanding verification and simulation steps has become essential,” said Sanjay Mehrotra, Chairman, president and CEO, Micron. “Through our expanded collaboration with Cadence, we’re integrating GPU-accelerated design technologies—powered by NVIDIA computing—and building agentic AI directly into our development environment.”
Larsen & Toubro Semiconductor is using the Cadence Spectre X Simulator, accelerated up to 5X with NVIDIA GPUs, to shorten design cycles for next-generation AI and data center chips as the company advances India's sovereign semiconductor ambitions.
"Faster design iteration and verification directly translate into competitive advantage and time to market for the highly customized AI silicon we're building," said Sandeep Kumar, CEO, Larsen & Toubro Semiconductor. "GPU-accelerated performance from Cadence’s Spectre X Simulator gives our teams the throughput to confidently move complex, AI-ready chips into production faster."
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Brent Fischthal - Koh YoungSuggested Items
PCB Technologies to Exhibit at PCB East 2026
04/23/2026 | PCB Technologies Ltd.Issey Ende, PCB-Technolgies’ VP of Sales and Marketinghas announced that his company will be exhibiting at this year’s PCB East 2026, the premier East Coast conference and exhibition for the electronics design, fabrication, and assembly industry on Wednesday, April 29, 2026, at the DCU Convention Center in Worcester, Massachusetts.
Design for Test: A New Book from The Test Connection, Inc.
04/23/2026 | Real Time with... APEX EXPOBert Horner, president of The Test Connection Inc., shares insights on designing for testability (DFT) challenges with Kelly Dack. Horner discusses the critical need for incorporating testability early in the design process and the importance of quantifiable metrics for measuring test coverage. He highlights The Test Connection's role in transferring decades of 'tribal knowledge' to emerging engineers through training and education. Look for "The Printed Circuit Assembler's Guide to... Design for Test, A Practical Guide to Test and Inspection" in the I-007eBooks library.
Changing Times: Siemens Plans to Sell Former Mentor Graphics Wilsonville Campus
04/22/2026 | Nolan Johnson, I-Connect007Siemens announced it will be selling its Wilsonville, Oregon, property, which has served as the campus for Mentor Graphics, which was later acquired by German EDA-giant Siemens, as reported by The Oregonian on April 20. Siemens will maintain one building on the sprawling 53-acre campus, citing the move to hybrid and remote work over the past few years as a key factor in the decision.
Siemens Collaborates with TSMC to Advance AI for Semiconductor Design
04/22/2026 | SiemensSiemens announced the continuation of collaboration with TSMC to drive innovation in AI-powered automation and advanced semiconductor design enablement.
Standardization, Workforce, and the Road Ahead for Flex–Packaging Integration, Part 3
04/22/2026 | Anaya Vardya, American Standard CircuitsParts 1 and 2 of this series established the technical foundation and application landscape for the convergence of flexible PCBs and advanced semiconductor packaging. Part 3 addresses what comes next: the standards frameworks, talent pipelines, and strategic imperatives that will determine whether the industry can scale this convergence reliably and competitively.