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Designers Notebook: Design Challenges for Developing High-density 2.5D Interposers, Part 2
Author’s Note: Read Part 1 here.
2.5D Interposer Design
A typical 2.5D substrate application supports the interfacing of one or more high-density semiconductors. While the upper surface will accommodate a majority of semiconductor redistribution and/or die-to-die interface for multiple die applications, the primary I/O channels and power and ground terminals are transferred to the bottom surface of the interposer through plated or filled microvias for routing to an array pattern of terminals designated to interface with the intermediate package substrate or host PCB structure requiring significantly lower circuit density. Although the overall circuit density of the 2.5D interposer is significantly greater than the mainstream HDI circuit board, the commercial CAD tools already available for PCB circuit routing should accommodate most interposer development activity.
In preparation for developing the interposer, designers are advised to prepare a description of the proposed substrate, detailing the semiconductor element(s) physical parameters, intended use environment, and timeline anticipated for development. The 2.5D substrate fabricator can then recommend a suitable base material (organic, silicon or glass) and define the fabricator’s via forming methodologies, metalization process capabilities, and circuit geometry limitations.
Base Materials
The primary base materials utilized for the 2.5D interposer applications include glass-reinforced organic laminates, silicon (wafers or panels), and ruggedized glass panels.
To read this entire column, which appeared in the November 2019 issue of Design007 Magazine, click here.
More Columns from Designer's Notebook
Designers Notebook: Heterogeneous Interposer Design Challenge, Part 3Designers Notebook: Heterogeneous Interposer Design Challenge, Part 2
Designers Notebook: Heterogeneous Interposer Design Challenge, Part 1
Designers Notebook: Power and Ground Distribution Basics
Designers Notebook: Basic PCB Planning Criteria—Establishing Design Constraints
Designers Notebook: Layer Stackup Planning for RF Circuit Boards
Designers Notebook: Addressing Future Challenges for Designers
Designers Notebook: Impact of Advanced Semiconductor Packaging on PCB Stackup