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Designers Notebook: Layer Stackup Planning for RF Circuit Boards

When designing multiple layer circuits requiring impedance control, the circuit board designer will work closely with an engineering specialist cognizant of RF printed circuit board design and layout, including mixed-signal applications. The RF engineer will be able to furnish the circuit board designer guidance for "best practices" when planning the RF circuit board and manufacturing guidelines that may apply to particular components, recommend qualified circuit board fabricators, and specify suitable base materials and copper foil materials for the application. 

Controlled impedance is the characteristic impedance of a transmission conductor’s associated reference planes. Impedance control is most relevant when high-frequency signals cross over transmission lines on adjacent layers for RF circuits; a uniform controlled impedance will be imperative in achieving signal integrity and provide signals with minimal distortion. The RF engineer will guide the circuit board designer in establishing the thickness and location in the layering scheme for the copper-clad, glass-reinforced core materials and the thickness of the prepreg material selected for joining layers during the lamination process.

A key concern is establishing the dielectric core material’s thickness. The dielectric thickness will determine the physical separation of the conductors on the signal layer from the “reference plane” layer. The following furnishes a number of “best practices” from RF engineering specialists.

RF Transmission Conductors

• Care must be taken to prevent unintended coupling between signal conductors. Conductors should be kept as far apart as possible and should not be routed in close proximity for extended distances.
• Coupling between parallel microstrip conductors will increase with decreasing separation and increasing parallel routing distance.
• Conductors that cross on separate circuit layers should have a copper ground plane layer to provide separation.
• Conductors with high power levels should be spaced away from all other signal conductors whenever possible.

High-Speed Digital Signal Conductors
These lines should be routed separately on a different layer than the RF signal lines to prevent coupling. Digital noise (from clocks, PLLs, etc.) can couple onto RF signal lines, and can be modulated onto RF carriers. Alternatively, in some cases digital noise can be up-/down-converted.

Power and Ground Decoupling
Decoupling/bypass capacitors should be provided at the main VCC distribution node, as well as at VCC branches. The choice of the bypass capacitance values will be made based on the overall frequency response of the RF IC and the expected frequency distribution nature of any digital noise from clocks and PLLs. These lines should also be separated from any RF lines that will transmit large amounts of RF power.

Conductor Planning for RF Applications
There are two basic types of conductors employed for transmitting RF signals: microstrip and stripline. The primary difference between these two conductors is the position of the signal conductor(s) in relation to the reference planes. Impedance control is most relevant when high-frequency signals cross over transmission lines on adjacent layers. Microstrip conductors will be routed on the outer surface of the substrate while strip-line conductors are sandwiched between two reference planes. The stripline illustrations furnished in Figure 1 are typical transmission lines implemented for controlled impedance applications. Impedance control is most relevant when high-frequency signals cross over transmission lines on adjacent layers. The stripline function is identical to microstrip, but the RF signal is surrounded top and bottom by ground. The ground planes provide isolation to minimize outside interference with the RF signal transmission on the stripline.

The spacing between the two conductors of a differential pair should be no more than double the width of the conductors. As an example, a 0.10 mm (~0.004") wide differential pair of conductors should not be separated by an area greater than 0.20 mm (~0.008") and the individual conductor width should not exceed double the dielectric thickness between adjacent signal layer and reference layer. 

High-frequency RF Signal Issues
For very-high-frequency circuit applications, the conductor’s surface smoothness is a major concern. To address this issue, the foil supplier companies are providing better surfaces and, to maximize copper-to-dielectric adhesion, have introduced oxide replacement bonding treatments that will provide a smoother surface when applied to inner-layer conductors prior to lamination.

Signal Line Isolation
Care must be taken to prevent unintended coupling between signal lines. Some examples of potential coupling and preventative measures: RF transmission conductors should be kept as far apart as possible, and should not be routed in close proximity for extended distances. Coupling between parallel microstrip lines will increase with decreasing separation and increasing parallel routing distance. Conductors that cross on separate layers should have a ground plane keeping them apart. Signal conductors that will carry high power levels should be kept away from all other lines whenever possible. The grounded coplanar waveguide provides for excellent isolation between lines. It is impractical to achieve isolation better than approximately -45dB between RF conductors on small PCBs.

High-speed Digital Signal Conductors
These conductors should be routed separately on a different layer than the RF signal lines to prevent coupling. Digital noise (from clocks, PLLs, etc.) can couple onto RF signal lines, and these can be modulated onto RF carriers. Alternatively, in some cases, digital noise can be up/down-converted. Likewise, VCC/Power interconnect should be routed on a dedicated layer. Also, adequate decoupling/bypass capacitors should be provided at the main VCC distribution node, as well as at VCC branches. The choice of the bypass capacitances must be made based on the overall frequency response of the RF IC, and the expected frequency distribution nature of any digital noise from clocks and PLLs. These conductors should also be separated from any RF lines that will transmit large amounts of RF power.

Ground Planes
The recommended practice is to use a solid (continuous) ground plane on Layer 2, assuming Layer 1 is used for the RF components and transmission lines. For stripline and offset stripline variations, a ground plane above and below the center conductor is required. These planes must not be shared or assigned to signal or power nets, but must be uniquely allocated to ground. Partial ground planes on a layer, sometimes required by design constraints, must underlie all RF components and transmission lines. Ground planes must not be broken under transmission line routing. Furthermore, ground vias between layers should be added liberally throughout the RF portion of the PCB. This helps prevent accrual of parasitic ground inductance due to ground-current return paths. The vias also help to prevent cross-coupling from RF and other signal lines across the PCB.

Special Consideration on Bias and Ground Layers
The layers assigned to system bias (DC supply) and ground must be considered in terms of the return current for the components. The general guidance is to not have signals routed on layers between the bias layer and the ground layer.

Power (Bias) Routing and Supply Decoupling
If a component has several supply connections, a common practice is to use a "star" configuration for the power-supply routes. A larger decoupling capacitor (tens of μFarads) is mounted at the "root" of the star, and smaller capacitors are mounted at each of the star branches. The value of these latter capacitors depends on the operating frequency range of the RF IC and their specific functionality (i.e., interstage vs. main supply decoupling).

Selecting Decoupling or Bypass Capacitors
Real capacitors have limited effective frequency ranges due to their self-resonant frequency (SRF). The SRF is available from the manufacturer, but sometimes must be characterized by direct measurement. Above the SRF, the capacitor is inductive and, therefore, will not perform the decoupling or bypass function. When broadband decoupling is required, standard practice is to use several capacitors of increasing size (capacitance), all connected in parallel.

The smaller value capacitors normally have higher SRFs (for example, a 0.2 pF value in a 0402 SMT package with an SRF = 14 GHz), while the larger values have lower SRFs (for example, a 2 pF value in the same package with an SRF = 4 GHz). Guidance for selecting capacitor values is furnished in Table 1.

Bypass Capacitor Layout Considerations
Since the supply lines must be AC ground, it is important to minimize the parasitic inductance added to the AC ground return path. These parasitic inductances can be caused by layout or component orientation choices, such as the orientation of a decoupling capacitor's ground. The vias connecting the VCC pad on the top layer to the inner power plane (layer) potentially impede the AC ground current return, forcing a longer return path with resulting higher parasitic inductance. Any AC current flowing into the VCC pin passes through the bypass capacitor to its ground side before returning on the inner ground layer. This configuration presents the smallest total footprint for the bypass capacitor and related vias.

Final Note
Designers working with companies developing products with RF-dominant products may already have proven experience in RF, but, for the greater majority of us, there is still a lot to learn. To prepare for developing the circuit board requiring controlled impedance, the designer can gain a great deal of guidance from the designated circuit board supplier, the actual company responsible for fabricating the circuit board.

This column originally appeared in the April 2025 issue of Design007 Magazine.