MKS Atotech Highlights Everplate Cu 300 2TF for Advanced Packaging

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MKS Inc., a global provider of enabling technologies that transform our world, recently highlighted Everplate Cu 300 2TF from its Atotech brand. This electrolytic copper process is designed for next-generation semiconductor manufacturing and enables the deposition of fine-grained, metastable copper for direct Cu-to-Cu bond formations in advanced semiconductor packaging.

As advanced packaging architectures move toward larger panel formats, tighter overlay, lower warpage, and higher I/O density, glass is gaining relevance as a substrate option for heterogeneous integration. At the same time, the very properties that make glass attractive also make metallization more difficult. MKS’ Atotech’s wet process is designed to convert this materials challenge into a manufacturable flow for production-oriented environments.

Supporting hybrid bonding manufacturability

Hybrid bonding is becoming increasingly important as semiconductor packaging advances toward smaller, denser assemblies and finer interconnection pitches, particularly in applications such as high-bandwith-memory (HBM), 3D NAND, and high-performance computing 3D system-on-chip. The process involves bringing extremely flat, smooth, and clean surfaces into contact to create direct bonds without the use of adhesives or solders. It typically combines dielectric bonding at ambient temperature with annealing. During this process, the copper expands to close the remaining gaps and form direct metallurgical bonds. Everplate Cu 300 2TF is designed to deliver precise, stable process control for low-temperature hybrid bonding. It also supports high-density interconnect formation with fine-grained copper that maintains structural stability and promotes recrystallization during thermal processing.

Everplate Cu 300 2TF enables direct Cu-to-Cu bond formation using fine-grained, metastable copper and supports low-temperature bonding for high-density interconnects. Additionally, it is designed to maintain copper structural stability through thermal processing. These characteristics are intended to help manufacturers better manage thermal budgets, improve process reproducibility, and support broader manufacturability as hybrid bonding moves closer to production scale.

Built for advanced packaging roadmaps

By enabling direct Cu-to-Cu bond formation with fine-grained metastable copper, Everplate Cu 300 2TF expands the MKS’ Atotech semiconductor portfolio for next-generation advanced packaging. The company’s semiconductor offering focuses on wet chemical process solutions for pad metallization, copper pillar, redistribution layer, via plating, and interconnect metallization for advanced packaging and power semiconductor applications.

“As hybrid bonding moves closer to broader manufacturing adoption, customers need copper processes that support bond quality, thermal budget control, and reproducibility in advanced packaging flows,” said Britta Schafsteller, Global Product Manager for Semiconductor at MKS’ Atotech. “Everplate Cu 300 2TF is designed to help manufacturers address these requirements as they scale next-generation interconnect architectures.”

Atotech, a brand within the Materials Solutions Division of MKS, develops process and manufacturing technologies for advanced surface modification, electroless and electrolytic plating, and surface finishing. Its portfolio includes chemistry, equipment, software, and services for high-technology applications and is supported by a global TechCenter network and on-site customer support.

Key technical highlights:

• Why hybrid copper bonding is becoming important for fine-pitch 2.5D and 3D integration
• The hybrid bonding process, from copper deposition and CMP to pre-bonding and annealing
• The role of copper microstructure in low-temperature Cu–Cu interface formation
• The Everplate® Cu 300 fine-grain electroplating process
• Queue-time stability and thermally activated copper grain growth
• The influence of via geometry and seed-layer texture on recrystallization
• Process-integration considerations for wafer-to-wafer and die-to-wafer bonding