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Keysight, Synopsys Deliver an AI-Powered RF Design Migration Flow
June 6, 2025 | BUSINESS WIREEstimated reading time: 2 minutes
Keysight Technologies, Inc. and Synopsys, Inc. introduced an AI-powered RF design migration flow to expedite migration from TSMC’s N6RF+ process to N4P technology, to address the performance requirements of today’s most demanding wireless integrated circuit applications. Building on TSMC’s Analog Design Migration (ADM) methodology, the new RF design migration workflow integrates RF solutions from Keysight and the AI-powered RF migration solution from Synopsys to streamline the redesign of passive devices and design components to TSMC’s more advanced RF process rules.
RF circuit designers can now use AI technologies for RF design migration with TSMC’s ADM methodology. Beyond the productivity gains offered by ADM, the Keysight and Synopsys migration workflow leverages the performance gain of the N4P process for the LNA design migrated from N6RF+. Key components of the design migration flow include the Synopsys Custom Compiler™ layout environment with Synopsys ASO.ai™ for rapid analog and RF design migration, Synopsys PrimeSim™ circuit simulator, and Keysight RFPro for device parameterization, automated value fitting, and electromagnetic (EM) simulation.
AI enables and aids RF circuit designers in a novel way to rapidly achieve the migration process and redesign to the N4P process, resulting in faster time-to-market. Synopsys Custom Compiler, along with ASO.ai, an AI-driven analog design migration solution, identifies optimal design parameters to meet performance metrics. Keysight RFPro enables parameterization of passive devices, including inductors, and automatically re-creates simulation models with layouts tuned to the new process rules.
Sanjay Bali, Senior Vice President of Strategy and Product Management at Synopsys, said: “Analog design migration is a challenging and time-intensive process requiring significant trial and error. Our deep collaboration with Keysight Technologies and TSMC enables design teams to boost their productivity with an AI-powered RF design migration flow to accelerate the redesign process and deliver RF designs more efficiently, while achieving the best PPA (Power, Performance, and Area) on TSMC’s advanced nodes.”
Niels Faché, Senior Vice President of Keysight’s Design Engineering Software, said: “Meeting PPA requirements while adhering to new process design rules is one of the biggest challenges facing complex RF chip designs. RF circuit designers want to leverage and reuse their libraries of N6RF+ devices and component intellectual property to improve ROI. The deployment of Synopsys ASO.ai for efficient analog design migration and Keysight RFPro for passive device modeling within TSMC’s ADM methodology facilitates accelerated redesign in the advanced TSMC N4P technology for existing components originally built in N6RF+. No time-consuming data handoffs or domain specialization are required, which increases overall engineering productivity for RF circuit designers.”
Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC said: “We offer a powerful combination of advanced logic and mixed signal/radio frequency (MS/RF) technologies, enabling our customers to design differentiated wireless connectivity products. Through collaboration with our Open Innovation Platform® (OIP) design ecosystem partners such as Keysight and Synopsys, we’re delighted to deliver a highly efficient RF design migration flow. This enables our customers to quickly transition their designs to more advanced processes, maximizing performance and power efficiency benefits while accelerating time-to-market.”
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Sweeney Ng - CEE PCBSuggested Items
Mastering PCB Floor Planning
08/28/2025 | Stephen V. Chavez, Siemens EDAPlacement of PCB components is far more than just fitting components onto a board. It’s a strategic and critical foundational step, often called “floor planning,” that profoundly impacts the board’s performance, reliability, manufacturability, and cost. Floor planning ties into the solvability perspective, with performance and manufacturability being the other two competing perspectives for addressing and achieving success in PCB design.
Elementary Mr. Watson: Routing Hunger Games—May the Traces Be Ever in Your Favor
08/26/2025 | John Watson -- Column: Elementary, Mr. WatsonI’d like to share a harsh truth, and I say this as a friend: PCB designers are often their own worst enemy. It’s rarely the complexity of the circuit, the last-minute changes from mechanical, the limited enclosure space, or the ever-expanding list of design rules that send projects to the dust heap of failed boards. More often, it's our own decisions, made too quickly and narrowly, and with too little foresight, that sabotage an otherwise good design.
Target Condition: Floor Planning Without a Floor
08/27/2025 | Kelly Dack -- Column: Target ConditionBy a show of hands, how many PCB designers have been asked to start a layout without a board outline, keep-out zones, or even height constraints? How many have had to work within a specific enclosure before the schematic was finalized? If this sounds familiar, you're not alone. Starting a PCB layout without critical constraints is like hiring an interior designer to buy furniture and carpet for a house you haven’t even purchased yet, or, even worse, trying to fit four bedrooms' worth of furniture in a one-room cabin.
I-Connect007 Editor's Choice: Five Must-Reads for the Week
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New Episode Drop: MKS’ ESI’s Role in Optimize the Interconnect
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