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Happy's Tech Talk #6: Looking at the Process of Repanelization

I have spent many years in printed circuit fabrication, including nearly 20% of my career in Asia. One problem that concerns all fabricators is the issue of how many “X-outs” are allowed per assembly sub-panel array. Here are a couple of solutions I have used and encountered in my travels.

X-outs
Many of you may follow the good advice of Greg Papandrew, who writes about PCB issues. He says, “X-outs are allowed. However, not more than 20% of the PCBs in an array can be X’d-out, and no more than 10% of the arrays to be shipped may contain an X-out. X’d-out arrays are to be segregated and identified accordingly at time of shipment.”¹

X-out Repanelization Replacement Technology
The process that my engineering group developed was a “replacement” technology. This process was developed as part of enhancing the number of good arrays that we were shipping, thus eliminating waste.

Perfect yields are always the goal, but when faced with the production obstacle that has more than 20% X-outs on an array, the ability to “repanelize” with good boards creates an “all good array” when the alternative was to scrap good boards. This process is shown in Figures 1 and 2.

The process of repanelization consists of seven steps:

1. By lot acceptability. Does the customer and board costs indicate this is a good business move?
2. Rout the good boards out of their array. Then rout the opening for the board in the new array.
3. Do the array dimensions permit the substitution?
4. Affix the array and added boards in a fixture that will hold the individual pieces.
5. Apply the glue that will hold the board in the array.
6. Cure the glue either by heat or UV light.
7. Measure the placement to match any specifications (Figure 2).

Optimized Repanelization
Customers are not always aware of the added costs subpanel-arrays may create. Tightly packed arrays are not a cost problem, but if the customer or EMS has spaced the boards apart and the materials are expensive, this wasted material will increase the cost of the board or array. With the costs of high-layer count multilayer and HDI going up, we modified the replacement process to create a new paradigm in array design. When the costs indicate that the array layout creates a lot of wasted material, we have the CAM department lay out a multi-image panel for production. After test and inspection, the good boards are placed in an array made to the array specifications from a routed bare FR-4 material.

The advantages of this process are:

1. Single module and break-aways can be individually produced.
2. Increases the production panel material utilization or plating distribution.
3. Improves the dimensional stability.
4. Reduces environmental pollution and scrap caused by discarded boards.

The process is seen in Figures 3 and 4.

Interestingly, some customers now prefer this standardized-optimized array procedure to the old array method.

A good example of this is shown in Figure 5. The 12-layer HDI board (3+6+3) was ordered by the customer in the array of 3-up. By using a production panel of 8-up or 12-up, even with the additional material of the carrier and labor, the cost of this HDI board was reduced by $7 per board.

References

1. Better Board Buying Blog, by Greg Papandrew, Oct. 21, 2021.

This column originally appeared in the March 2022 issue of PCB007 Magazine. 

Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Packard, NanYa Westwood, Merix, Foxconn, and Gentex. He is currently a contributing technical editor with I-Connect007, and the author of Automation and Advanced Procedures in PCB Fabrication, and 24 Essential Skills for Engineers.