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Challenges of Electrical Test

Challenges to electrical test are many, but a few come to mind as the most challenging. What do you think they are? Here’s what I think:

3. Pitch and density

2. Volume

And the #1 most challenging attribute to electrical test: soldermask! In our arena today, we can solve pitch and density with flying probe machines, and volume with our grid testers, but the catalyst that is in the mix is that pesky soldermask! So why do I bring up that necessary process as a problem for electrical test?

Electrical test is an absolute science test based on mathematics and absolutes. Frontend systems rasterize the given data to absolutes. If the IPC, Gerber, and ODB++ data show the alignment of layers to the mask, it is an absolute measurement. There are no easements for registration. The test points are assigned to the product based on the absolute clearance allowed in the “Golden” data supplied in the CAD Reference.

But there is a disconnect.

To be blatantly accurate, it never happens. The phenomenon of via cap, via fill and zeroheight via fill all come in to play to change the whole game regardless of what the OEM designed. Tolerances are never considered.

Read the full column here.Editor's Note: This column originally appeared in the January 2015 issue of The PCB Magazine.