Siemens Advances AI Chip Lithography with NVIDIA cuLitho

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Siemens announced significant advances in its collaboration with NVIDIA to accelerate computational lithography workflows. By integrating NVIDIA cuLitho, a CUDA-X library for GPU-accelerated computational lithography, with Calibre® manufacturing software, Siemens is enabling semiconductor manufacturers to overcome the runtime-limited challenges of advanced patterning, making next-generation AI semiconductors a manufacturing reality.

The patterning bottleneck challenge

As the industry aggressively moves toward leading-edge process nodes, the complexity of lithographic patterning has increased exponentially. Traditional optical proximity correction (OPC) and computational lithography techniques face a "runtime wall." The transition to High-NA EUV and the requirement for advanced curvilinear patterning - such as Inverse Lithography Technology (ILT) - demand massive computational resources.

Without acceleration, these essential techniques are often too slow for full-chip, manufacturing-scale deployment, and forcing engineering teams to make trade-offs between optimization depth and project schedules. This creates a risk of lithographic hotspots and reduced process margins, which can impact yield for the most advanced AI compute and memory devices.

GPU-accelerated patterning to radically accelerate lithography simulation

Siemens and NVIDIA are transforming this challenge into an enabling technology. By delivering at least 10x acceleration for key lithography simulation workloads, the collaboration allows manufacturers to perform more comprehensive optimization and identify potential hotspots before tapeout.

“Computational lithography has traditionally been one of the most compute-intensive stages of the design-to-manufacturing flow,” said Ankur Gupta, executive vice president, EDA IC Portfolio, Siemens. “By combining Siemens’ signoff-grade Calibre technology with NVIDIA’s GPU acceleration, we are giving our customers the ability to deploy advanced patterning strategies like curvilinear ILT at scale. This isn't just about speed; it's about enabling the precision required for the next generation of AI infrastructure.”

“Next-generation chips are pushing the limits of manufacturing complexity, making computational lithography more critical than ever,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. “By bringing NVIDIA cuLitho acceleration to Siemens’ Calibre, we’re enabling engineers to tackle increasingly intricate patterns and explore more extensive optimizations needed to manufacture the world’s most advanced chips.”

Measurable value to chip and photomask manufacturers

The collaboration provides semiconductor and mask manufacturers with measurable performance gains across critical computational lithography workflows. Verified engineering data supports simulation speed-ups ranging from at least 10x to 17x for key workloads, helping make full-chip curvilinear patterning practical for High-NA EUV production.

By reducing simulation runtimes, manufacturers can complete more iterations in less time, identify lithographic hotspots earlier and improve process margins before tapeout. This faster turnaround can also help accelerate manufacturing readiness and support the deployment of new AI silicon.