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Advanced Electronics Packaging Digest

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Trouble in Your Tank: Pre-electroless Causes of Voids

09/02/2026 | Michael Carano -- Column: Trouble in Your Tank
To support advanced 2.5D and 3D heterogeneous integration, product and motherboard designs are now using higher layer counts. As layer counts increase, plated through-holes (PTHs) become deeper and higher in aspect ratio, making it more difficult to achieve a continuous, void-free copper deposit. Drilling these thicker panels and higher aspect ratio vias adds another layer of complexity. Since there are many potential causes of PTH voiding, I’ll focus on pre-electroless copper causes, including drilling.

Ventec’s Glass-Free Revolution: Smarter Material Data for Next-Gen PCB Designs

08/13/2026 | Ventec
At Ventec, we’re excited to see our Glass-Free Bondply materials now included in the latest release of Polar Instruments’ Speedstack.

Polar's Speedstack Eases Material Identification and Adds Ventec Glass-Free Materials

08/10/2026 | Polar Instruments
Polar’s Speedstack mid-year release adds Ventec Glass-Free materials to online resources, and incorporates improved capability of identifying multi material families in the stack documentation, giving users “at a glance” visual views of material types in a stack.

Sumitomo Chemical Subsidiary to Establish of a Joint Venture with Samsung Electro-Mechanics for the Glass Core Substrate Business

07/13/2026 | Sumitomo Chemical
Sumitomo Chemical today announced that its wholly owned Korean subsidiary, Dongwoo Fine-Chem Co., Ltd. , has signed a joint venture agreement with Samsung Electro-Mechanics Co., Ltd. to establish a joint venture company that will engage in the business of glass core substrates for advanced semiconductor packages.

ACCM Introduces Celeritas SMC: A Production-Ready, Silicon-Matched Core for Advanced Packaging

07/07/2026 | BUSINESS WIRE
Advanced Chip and Circuit Materials (ACCM) introduced Celeritas SMC (Silicon-Matched Core), a production-ready core for advanced IC substrates engineered to match the in-plane coefficient of thermal expansion of silicon while running on established organic-substrate manufacturing lines.
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