IC Substrates vs. UHDI: The Future of Interconnect

Estimated reading time: 9 minutes

Advanced packaging is driving feature sizes below 50 microns, forcing IC substrates and UHDI PCBs into overlapping territory. Following his presentation at the Pan-European Design Conference (PEDC) in January, Jan Pedersen, director of technology at NCAB Group, spoke with us about how heterogeneous integration, evolving HDI roadmaps, and supply chain pressures are shaping the next phase of advanced packaging.

Marcy LaRont: Jan, at your PEDC presentation on IC substrates vs. UHDI PCBs (and you’re even wearing a T-shirt that represents that message), you talked about being on a journey. Can you tell me what you said and what it meant?

Jan Pedersen: Marcy, I started my presentation by saying, “We are all on a journey. If you think you have reached your optimum, your target, then you are close to retirement or on your way to closure.”

For quite some time, the PCB world has been a calm ocean, with few real disruptive challenges. We first began discussing HDI in the 1990s, and nearly 30 years passed until we finally pushed into ultra HDI. That’s a long time in an increasingly fast-moving world. Throughout that time, the industry has largely lived with a lower limit of 50 microns. Of course, a few companies broke that barrier early on, but, even today, mainstream HDI fabrication remains comfortably above 50 microns, where it has been for a quarter of a century.

LaRont: I get the feeling that doesn’t sit well with you.

Pedersen: I’m a rather impatient person. I like to make things happen. I began noticing this lack of progress while we were developing the medical addendum to IPC-6012. In that committee, we identified the need for sub-50-micron design standards in certain medical applications.

At the time, I discussed this with John Perry, our liaison at the Global Electronics Association, and raised it again in the committee chair council during IPC APEX EXPO 2017. To make a long story short, we released the IPC-6012 medical addendum in 2018, the first IPC standard ever to include a sub-50-micron specification.

Now, the ocean is no longer calm. Components have changed dramatically. We’ve moved from wire-bonded chips mounted to PCBs to the “flip-chip generation” of heterogeneous integration.

LaRont: What do you see as the challenge for companies in this regard?

Pedersen: Their great challenge is defining their technology roadmaps. Anyone who assumes our current HDI practices will remain sufficient for the long term will face some serious difficulties. That’s why I opened my presentation by challenging the audience. A factory without a realistic development and investment roadmap may soon find itself unable to compete. The difficulty is knowing when that push will come.

At the same time, today’s HDI technology will continue to serve companies focused on more conservative industries. But I maintain that if you do not understand the dynamics of component development, you will eventually find yourself in a difficult position, though the impact will vary based on company size. Smaller companies may survive with niche manufacturing when larger players move away from certain segments.

LaRont: Jan, how do you define IC substrates vs. UHDI PCBs? What are the significant structural differences between the design and assembly requirements?

Pedersen: The primary difference lies in how they are used. An IC substrate sits inside the component, while an ultra HDI PCB carries the component. Although they can be manufactured in similar ways, especially when ultra HDI PCBs use semi-additive processes such as mSAP or similar technologies, the functional differences are critical.

The extreme miniaturization of the IC substrate’s top layers and the corresponding assembly requirements are far beyond what we typically see on ultra HDI PCBs. Cleanliness levels and specialized assembly processes, such as thermo-compression bonding, are also major differentiators. But both technologies are part of the broader landscape of heterogeneous integration.

From an application perspective, both are used in similar markets because an advanced IC substrate typically results in a fine‑pitch BGA that requires an ultra HDI PCB. Today, the primary drivers are AI applications across sectors such as medical, automotive, optics, and advanced sensors. AI is spreading across nearly every industry, which is why UHDI technology is expanding into so many domains.

Some people don’t include the PCB in heterogeneous integration, but I believe that’s exactly where the industry is headed.

We are already seeing early adoption and expect NVIDIA to use this approach in its Rubin GR150 platform toward the end of 2026. Once that happens, adoption will accelerate, and developers will increasingly demand these technologies.

My reference in my presentation to chip-on-wafer-on-package (CoWoP) was about the future, because it is not yet widely implemented. Significant challenges remain before the industry can fully embrace it. Remember, we are still in the early days of UHDI, except for the long-established leaders in semiconductor packaging.

LaRont: Would you also define heterogeneous integration?

Pedersen: Very simply, it means integrating separate elements that are manufactured separately; they’re not made in the same process.

For example, you have the PCB, the IC substrate or interposer, redistribution layers, and then chips or chiplets stacked on top. A typical example is a chiplet-based design, in which individual functional blocks are integrated into an overall package rather than fabricated as a single large monolithic chip.

LaRont: Is this genuinely new?

Pedersen: It’s not new; it’s been inside the component for decades. We’ve used BGAs for years, and heterogeneous integration has been evolving within those packages. Over the past 20 years, it has become more modular. You might have a chiplet on an interposer, with an IC substrate below that. What’s new is the scale and the performance expectations.

It’s important that we have a very large corporate locomotive driving this progress. We’re seeing early adoption of technologies such as CoWoP, but when the big players implement it at the platform level, adoption will accelerate quickly.

Developers will increasingly demand these capabilities. In my presentation, I wanted to show what we are doing now and what we can logically expect next.

LaRont: What was the traditional relationship between IC substrates and PCBs? Has it changed, or is this an evolution of what has always been?

Pedersen: I cannot speak to every historical use case, but generally, IC substrates have always been part of components mounted on a PCB. So, the relationship has always existed.

What has changed is the rapid development of chips, which has driven miniaturization at the interposer level. This, in turn, has increased the need for the advanced IC substrates we see today to ensure reliable assembly to PCBs that have not evolved as quickly.

However, the variety of redistribution layers, interposers, and IC substrates is enormous, so there is not a single “one‑size‑fits‑all” explanation. Chiplet architectures, 2D/2.5D/3D integration, and new packaging approaches all change the landscape. If CoWoP succeeds, we may even see a return to direct interposer‑to‑PCB—or even chip‑with‑RDL‑direct‑to‑PCB—approaches. NVIDIA will continue to be a driver of what becomes more standard.

LaRont: What’s your view on standards for emerging technologies, such as IPC-6012, the first to address sub-50-micron features? With technology moving so quickly, are we operating in areas without clear guidelines?

Pedersen: It has been a long journey from multilayer PCBs to ultra HDI. Our existing standards address multilayer and HDI, but not the full ultra HDI. After the medical addendum, we formed a discussion group to determine how to standardize ultra HDI and even what to call it. Three main tracks emerged:

1. Ultra HDI organic PCBs: IPC-2229, currently under development at the design level.
2. Performance: IPC-1619, also under development.
3. IC substrates: IPC-6921, again in development.

Additionally, IPC-9541 addresses system-in-package acceptability. 

Traditionally, standards follow technology. But given the pace of innovation, we must ask whether standards should evolve more proactively to enable faster, scalable development.

It’s been nine years since I first raised ultra HDI PCBs in a committee meeting. Progress has been slower than I would have liked. That said, under Matt Kelly’s technology leadership, we are moving in a better direction, but my concern is whether we are moving quickly enough to influence an industry that may already be developing strong corporate standards internally.

LaRont: The EV industry seems to be pushing for standards earlier, before processes are fully mature. Will that become a model for other sectors?

Pedersen: Yes. We began the automotive addendum to IPC-6012 in 2014, and that was my first role as a standards chair. Since then, the automotive initiative has driven numerous spinoff committees on materials, new test methods, and more. Even metal-based PCBs, which had been on hold, gained renewed attention. Automotive showed that when there is a strong industry pull, standards development accelerates.

LaRont: Let’s talk about capacity. What are the greatest challenges to expanding heterogeneous integration capability, especially on the UHDI side?

Pedersen: At PEDC, I analyzed both capability and capacity, and where constraints lie. I said we’ve seen significant growth for decades within the “global closed market,” meaning the large corporations driving the biggest technological leaps.

We know who they are. They have in-house capabilities or established OSAT partnerships, and they influence equipment suppliers, materials developers, IC substrate manufacturers, and packaging ecosystems. This has made it difficult for SMEs to access semiconductor-level packaging capabilities, even for sampling.

But that is beginning to change. Over the past two to three years, more suppliers have opened access. There is capacity in Europe and the U.S., but most investment is still occurring in Asia, especially China.

LaRont: That leads perfectly into supply chain. China remains central to semiconductor and UHDI supply chains, even as Western countries try to diversify for security reasons. What are the supply chain risks, and how should OEMs and fabricators navigate them?

Pedersen: You’re touching on a sensitive topic. There’s no simple answer. Raw material sourcing and geopolitics are complex. I’ll leave politics to others.

What I can say is that OEMs and manufacturers must closely follow semiconductor and packaging developments. They should participate in forums such as the Pan-European Design Conference and engage in these discussions early.

I would also encourage leading semiconductor corporations to be more proactive in involving R&D teams and SMEs in development discussions. We are missing that large technology locomotive presence at conferences and in committees. That absence is to all our peril. We can and should do better.

LaRont: Jan, it’s always interesting talking with you. Clearly, we have much more to discuss, and I look forward to continuing the conversation. Thank you for your time.

Pedersen: Thank you, Marcy. It’s been great talking with you.