Flexible Thinking: Designing Flex Circuits for Dynamic Reliability
Global PCB Connections: Rigid-flex and Flexible PCBs—The Backbone of Modern Electronics
Happy’s Tech Talk #29: Bend-to-Install Semi-flex FR-4
Beyond IPC-2152: Creating Technology-specific Current-carrying Capacity Design Charts Using Thermal Modeling
January 29, 2026 | Mike Jouppi, Thermal Management LLCEstimated reading time: 1 minute
Designers commonly size traces using online calculators based on IPC-2221 or IPC-2152 charts, selecting width and thickness for a given current and allowable temperature rise (ΔT). Consideration is given to parallel conductors, although this is not a practical evaluation method for most designs. An important aspect of trace heating, especially groups of traces, is the power dissipated by the conductors. Unfortunately, the power dissipation or a method for accounting for power losses in the traces/conductors or planes is not straightforward.
The thermal design of a PCB must consider all components, their power requirements, board material, board stackup, mounting conditions, environmental conditions, and trace/conductor power losses. PCB thermal analysis considers both steady state and transient conditions. We will discuss steady-state trace heating.
It's a common practice to determine a trace size based on current, steady-state temperature rise, and trace cross-sectional area. The issue is that the IPC chart temperature rise is much higher than what would be found for most designs. Additionally, trace power is not initially assessed, leaving a significant amount of power, especially in high-current designs, to be managed later in the design cycle.
Consider a previous PCB design used to create design charts for that PCB technology. A process for creating technology-specific design charts (TSDC) can be used to develop conductor sizing design charts that account for all PCB thermal design parameters. This provides a lot of new insights into your board technology. This process for generating PCB-specific current-capacity charts is documented in U.S. Provisional Patent 63/875,465.
It’s possible to evaluate the varying current-carrying capability around different areas of the board that have more or less copper. Design charts can be made for many different environmental conditions, such as on a lab bench or for worst-case operating conditions. A previous design is not necessary; it simply minimizes iterations and provides the designer with a lot more useful information.
To continue reading this article, which originally appeared in the January 2026 I-Connect007 Magazine, click here.
Share on:
Testimonial
"The I-Connect007 team is outstanding—kind, responsive, and a true marketing partner. Their design team created fresh, eye-catching ads, and their editorial support polished our content to let our brand shine. Thank you all! "
Sweeney Ng - CEE PCBSuggested Items
Zuken Launches GENESYS 2026 to Broaden Access and Improve MBSE Workflows
04/28/2026 | ZukenZuken announced GENESYS 2026, the latest version of its model-based systems engineering platform, with updates designed to improve performance, expand access to model-based information, and enhance the day-to-day modeling experience for engineering teams.
EDADOC: Building the ‘Neural Hub’ for High-Compute Chips Within a Compact Space
04/28/2026 | ECIOEvery chip to the market must pass a stringent checkpoint before shipment known as ATE testing. Serving as the physical “neural hub” that connects test equipment worth millions of dollars with the device under test, the performance of the ATE test board directly determines the accuracy, efficiency, and final yield of chip testing. Amid the rapid rise of high-compute chips, what extreme challenges is this seemingly small circuit board facing? How is EDADOC addressing industry pain points through its one-stop “design + manufacturing” model?
Cadence Reports Q1 2026 Financial Results
04/28/2026 | Cadence Design SystemsCadence had a strong start to 2026, delivering a solid Q1 with accelerating AI demand and record backlog, reflecting strong customer commitment to our AI-driven portfolio,” said Anirudh Devgan, president and chief executive officer.
Tomachie Launches AI-Powered PCB Analysis with Smart Test Point Insertion
04/28/2026 | TomachieTomachie announced its AI-Assisted PCB schematic design analysis platform, enabling engineering teams to evaluate and improve schematic quality before layout begins. Schematic errors caught after layout — or in production — cost 10 to 100 times more to fix than those caught during schematic capture.
The Pulse: Caught in the Crosshatch—A Cautionary Tale of Detective Work
04/29/2026 | Martyn Gaudion -- Column: The PulseA chance meeting at a family wedding the other week led to a conversation about numbers, an introduction to a book entitled Humble Pi, and how numeric misinterpretation can lead to all kinds of unexpected outcomes, some just costly, others tragic. It’s a good and amusing read, and as a result of this conversation with someone I had previously never met, I feel somewhat (at least temporarily) enlightened. One of the takeaways of the book is that humans are born to think logarithmically, and linear math has to be formally educated into our brains. That got me curious for more.