Share on:

Share on LinkedIn Share on X Share on Facebook Share with email


Advanced Electronics Packaging Digest

Subscribe

Stay ahead of the technologies shaping the future of electronics with our latest newsletter, Advanced Electronics Packaging Digest. Get expert insights on advanced packaging, materials, and system-level innovation, delivered straight to your inbox.

Subscribe now to stay informed, competitive, and connected.

Suggested Items

NHanced Semiconductors & University of Florida to Present on Advanced Packaging for Photonics at the 2026 SMTAI Conference

08/24/2026 | NHanced Semiconductors
The upcoming SMTA International Conference will feature a paper titled “Advanced Packaging for Photonics: Hybrid Bonding and Silicon Interposer Integration,” presented by NHanced Semiconductors vice-president Dr. Charles Woychik and Dr. Navid Asadizanjani from the Florida Semiconductor Institute at University of Florida.

NHanced Semiconductors, UF to Present Advanced Photonics Packaging at SMTAI 2026

08/18/2026 | PRNewswire
The upcoming SMTA International Conference will feature a paper titled “Advanced Packaging for Photonics: Hybrid Bonding and Silicon Interposer Integration,” presented by NHanced Semiconductors Vice President Dr. Charles Woychik and Dr. Navid Asadizanjani from the Florida Semiconductor Institute at University of Florida.

Trouble in Your Tank: In Complex Systems, Design Rules Aren’t Optional

05/06/2026 | Michael Carano -- Column: Trouble in Your Tank
There is no question that the electronics industry, especially in circuit board design and fabrication, advanced packaging, and innovation throughout the value chain, has seen a significant transformation, whether it be in materials, system architecture, HDI and ultra HDI, semiconductors, or chiplets. AI and high-performance computing (HPC) are driving change across several fronts, including material properties, assembly techniques (think hybrid bonding), and power management.

Designers Notebook: Heterogeneous Interposer Design Challenge, Part 3

03/16/2026 | Vern Solberg -- Column: Designer's Notebook
In just about any industry, time-to-market will establish the difference between the leaders and followers. Any new electronic product introduced into the market must meet or exceed stated performance criteria and provide reliable service to the end user experience. The original single-core monolithic system-on-chip developed for the earlier, less complex applications has long been superseded by the more sophisticated multiple-core variations.

Designers Notebook: Heterogeneous Interposer Design Challenge, Part 2

02/16/2026 | Vern Solberg -- Column: Designer's Notebook
As the need grows for higher processing speed and the expanded functionality required for newer generations of central processing units (CPUs), the necessity for higher-density interconnect solutions is paramount. The current trend toward furnishing a single, monolithic system-level semiconductor package has become a serious yield issue in fabrication. For example, with all of the peripheral supporting functions on a single die platform, wafer fabrication yields are often below target and, although the CPU portion of a monolithic semiconductor may be perfect, if one or more of the supporting functions on the same die fails, the entire processor unit must be discarded. 
Copyright © I-Connect007 | IPC Publishing Group Inc. All rights reserved. Log in