Estimated reading time: 18 minutes

EIPC Summer Conference, Day 2

A well-rested and bright-eyed audience re-assembled for an early start to the second day of the EIPC Summer Conference in Luxembourg and enjoyed an intense programme of 12 technical papers in three sessions: Advanced PCB Research Projects, PCB Design, and Novel Technologies, with an apparent preponderance of professors in the presenters’ line-up.

EIPC Vice President of Technology Professor Martin Goosey opened the proceedings and moderated Session 2: Advanced PCB Research Projects, commenting that the Institute continued to actively support, engage, and participate in collaborative projects. He introduced the first speaker, Professor John Tyrer from Loughborough University in the UK, whose presentation was entitled: “3-D printing of functional polyethylene structures with embedded circuit boards using novel holographic optics.”

“I like growing functional things!” Professor Tyrer declared as he described how laser direct writing could be used to produce real functional embedded circuits for security applications. Both the substrate and the conductor pattern were formed directly by laser-sintering of polymeric and metallic powders. Laser direct writing offered rapid prototyping capability by a high-speed layer-by-layer process that enabled complex structures to be created at high resolution. However, when plastic powders were sintered by conventional laser technology, there was a tendency for them to yield products with high porosity. The gaps between particles were not filled and heat was not transferred down to the lower layers of powder. This was a consequence of the Gaussian distribution of energy within a round laser beam giving non-uniform temperature distribution, leading to strong Marangoni flow, laser-induced thermal ejection, porosity resulting from local boiling of the material, thermal degradation in the region central to the beam, and thermal stresses due to uneven cooling,

The answer was to optimise the shape, intensity, and focus of the laser beam to suit the characteristics of the material, and this was done using computer-generated holographic optical elements to reconstruct the beam intensity to a custom-designed profile. Professor Tyrer showed how circuits could be constructed from polyethylene powder and silver paste, using CO2 lasers with beam profiles separately optimised for each material. He also discussed the complex mathematics used to model the physics of the process, explained the curing mechanisms and the morphology of the sintered materials and showed the stages in the formation of an actual embedded circuit, an example of “playing with the laser beam and getting it to do the job you want it to.”

The Sustainable Ultrasonically Enhanced Chemical Processes (SUSONENCE) project, in which EIPC had been directly involved as a consortium partner, was concerned with developing advanced sonochemical processes to reduce chemical usage and decrease waste in the PCB and metal finishing industries. Stuart Dalrymple, project manager at C-Tech Innovation in the UK, referred to traditional processes for surface modification using aggressive chemistries and process conditions: Permanganate desmearing of PCBs, chromic acid etching of plastic moulding resins and hydrofluoric acid etching of ceramics and glass, and asked “Can sonochemistry help?”

Reviewing the principles of acoustic cavitation, microjetting and microstreaming in the frequency range 20-100 KHz, he indicated how these effects could potentially be exploited to physically abrade surfaces and break down chemical diffusion layers then gave some examples of actual experimental results on “Noryl” polyphenylene ether and ABS/polycarbonate resins, using ultrasound in water. He demonstrated the effects of ultrasonic frequency, ultrasonic intensity, probe-to-workpiece distance, water temperature, and surfactant addition on weight loss. The project had produced a technology platform from which potential commercial applications were emerging and a TSB-funded feasibility study, carried out under the project name HEPROC, had investigated the effect of ultrasound on the permanganate etch process for drill smear removal in printed circuit fabrication. Using ultrasound, it had been possible to reduce permanganate concentration by 50% and temperature by 25°C and achieve the same results as the standard process in terms of weight loss and interconnection reliability. The next stage of the SUSONENCE project was a scale-up from laboratory to industrial implementation, and 300-litre evaluation units were currently being installed in PCB manufacturing plants.

So many acronyms! The next European project to be discussed was MESMOPROC Maskless Electrochemical Surface Modification. Professor Sudipta Roy of Royenface Ltd., a spin-out from Newcastle University in the UK, described how principles developed for an electrochemical micro-fabrication process called EnFACE were being scaled-up as a method for transferring circuit patterns onto PCB substrates. The process used a metallic tool with a resist pattern on its working surface, placed in close proximity to the substrate, and electrically connected through a plating rectifier. Electrolyte was pumped through the system to deliver fresh solution to the anode and cathode and to remove by-products. Depending on the polarity, metal was selectively plated on or etched from the substrate. The principal benefit of the EnFACE technique was that a single tool could be used for many patterning operations and hence offer cost savings by greatly reduce the requirement for photoresist and its associated processing.

Significant challenges remained to be addressed in engineering the process for industrial PCB fabrication, including implementing an agitation scheme to stir the electrolyte within the narrow gap between the tool and substrate, using this agitation scheme for larger substrates and achieving accurate registration between tool and substrate. Professor Roy discussed how the MESMOPROC partnership was addressing the issue of ensuring effective agitation within the tool-substrate gap to overcome the rapid depletion of metal ions during the electrodeposition of copper. Ultrasonic agitation methods were being studied as a means of controlling the diffusion layer and promoting mass transfer of copper ions, and a limiting current technique was being used to determine the effectiveness of agitation. An industrial-scale plating cell, incorporating ultrasonic agitation, had been designed and trials were proceeding. “Watch this space!”

The next presentation focused on another application of electrochemistry. Professor Dr. Magda Lakatos-Varsanyi from BAY-Zoltan Ltd. in Hungary discussed pulse-plated nano-structured iron layers for microelectronics applications. She explained that downscaling of power electronics devices had led to a demand for higher driving frequencies and higher working temperatures for inductive elements, and there was intensive research to find metallic-alloy replacements for commonly-used ferrites to allow higher flux densities and higher working temperatures, and to shift eddy-current frequency resistance limits above the 1MHz region. For surface-mounted inductive elements, the natural choice was a thin-film magnetic material that could be prepared by electrodeposition. The soft magnetic properties could be improved by using pulsed electrodeposition to give a nano-crystalline structure, which could be tailored by electrolyte composition and pulse plating parameters.

Professor Lakatos-Varsanyi described her experimental methods and testing procedures in detail. The outcome was that excellent soft magnetic pure iron with 12 nanometre grain size could be deposited from an electrolyte containing ferrous chloride, ferrous sulphate and magnesium sulphate. The layers were textured and exhibited a flat hysteresis loop, with a frequency limit of 20MHz at a layer thickness of 10 microns. Iron-nickel alloy layers deposited by pulse plating exhibited grain sizes of 5 to 8 nanometres and excellent soft magnetic properties, with low magnetic coercivity and low magnetic loss.

Session 3 of the conference was dedicated to PCB design, and was moderated by Oldrich Simek, owner of PragoBoard in the Czech Republic. His first two presenters were recognised specialists in high-speed design: Neil Chamberlain and Martyn Gaudion from Polar Instruments in the UK.

Chamberlain started from first principles in a discussion on design considerations for the routing of ultra-high-speed differential pairs, and the four critical signal integrity issues the designer needed to try to control were impedance, loss, cross-talk and mode conversion. “Impedance is about managing reflections.” Any mismatch in impedance would cause some of the signal power to be reflected back to its origin, rather than being carried all the way along the transmission line to the far end, and the ratio of energy bounced back depended on the impedance mismatch. Single-ended impedance mimicked the characteristics of a coaxial cable; differential impedance drove signals in equal and opposite directions, so that noise tended to be cancelled out, provided that the two lines were exactly the same.

To calculate impedance accurately required the use of a field solver, with trapezoidal modelling to properly represent the geometry of the conductor. And designers needed to be aware that solder mask could have a dramatic effect on the impedance of outer-layer tracks, particularly if it was hygroscopic. The limitations of materials were of fundamental significance in designing differential pairs and resin modelling was an important consideration. Typical FR4 laminate had a bulk dielectric constant of about 4.2, but there was a wide disparity between the individual values of glass (at about 6.0) and resin (at about 3.2). Thus a conductor could experience local variations in dielectric constant depending on where it sat relative to the glass weave within the laminate. Some laminate manufacturers had gone to great lengths to minimise the effect by using “flat-glass” fabrics, but it still had to be recognised and taken into account.

Turning his attention to signal loss, Chamberlain acknowledged that signal lines were rarely ideal, and long lines and high speeds could contribute to loss by DC resistance. Of the characteristics most affecting loss, line length could only be controlled at the design stage, but dielectric loss could be controlled by appropriate material selection. Resistive copper loss could be controlled by conductor cross-sectional area and stack-up design, and loss due to copper surface roughness by choosing an appropriate grade of foil. He concluded that although loss and impedance were independent and required different measurement techniques, it was important to control both.

Gaudion led the discussion of loss into more detail, describing work he had done jointly with Intel to offer their designers the opportunity to accurately predict insertion loss on stripline traces and achieve cost-effectiveness and repeatability in the real-life situation where PCBs could be sourced from a wide range of different manufacturers. The study was carried out on SET2DIL coupons representing a variety of designs and materials, gathered from multiple sources, together with information regarding dielectric material, copper foil type and design geometries. Differential insertion loss, impedance, and resistance measurements were made on the coupons, and samples were cross-sectioned to measure actual trace dimensions. The measurements were compared with results from modelling. The exercise had shown that, given adequate knowledge of the design, differential insertion loss could usually be predicted to within 0.05 dB per inch at 4GHz, provided all the variables were known accurately.

Nikola Kontik, business development manager with Zuken UK, took a look into new technology solutions and future challenges in PCB design. Apart from the inescapable trend to increased design complexity, two particular electronic product design challenges facing the PCB designer were the disconnect between product planning and product realisation, and the third-dimension problems presented by advances in packaging technology.

Time-to-market pressures were reducing design cycle time and changing the shape of concurrent design. Whereas separate design departments might previously have worked independently at PCB and system level, the present trend was to use a multi-level design platform that allowed teams to work concurrently on complex multi-board electronic designs and take a three-dimensional approach to optimising interconnectivity all the way down to the silicon.as well as collaborating closely with mechanical designers, so that the whole system was effectively designed as one. The coordination of global design teams, library and design data management and IP protection were additional issues to be considered.

What challenges did the future hold for the designer? On one hand, developments in internet-capable converging technologies and mobile electronic systems: Tablets and ultrabooks, smartphones, smart televisions, smart grids, and advanced metering infrastructures, and in the automotive area, developments in communication and wireless technology, in-car infotainment, web-browsing and online services, Bluetooth and near-field communication and wireless networks, intelligent systems, advanced driver assist systems, sensors, and proximity controls. All to be designed with leading-edge technology…

Noted for his plain-talking approach to design issues, Martin Cotton, director of technology PCB Europe with Sanmina-SCI, began his presentation on practical design considerations of high-speed PCBs with the statements: “I will be assuming that you know what the following are: Impedance, resistance, jitter, frequency, etc. This is not a classroom for hardware designers--it’s not a classroom at all. The word I have chosen is 'practical!'”

Cotton joined the PCB world 17 years ago, from a long-term background in electronic design, hoping to make a difference. “I failed! They still don’t listen. They still don’t talk to each other.”

The practical example he chose for illustration was a 36-layer backplane, 100 ohm impedance, working at a data rate of 10Gb’s. He emphasised the distinction between data rate and frequency, and asked the question whether the data rate referred to a single differential pair channel or for a buss, because the buss speed was the total of all the channels in that buss. In his terminology, 100 ohm differential impedance used two tracks operating in harmony such that losses were kept to a minimum. The geometry of those tracks and their positioning with the PCB build structure were critical to realising a successful design and hence being able to manufacture at good yield. The setting-up of differential pairs began with material selection, and he recommended talking to material suppliers to get the benefit of their experience in designing materials with Dk and Df values to suit particular data rate and speed applications. Then it was necessary to create “cells,” defining trace separation, pair separation and layer-to-layer separation. He was not a fan of the old “3x separation” rule for establishing approximate cell geometrics, and preferred impedance modelling with specialist software for calculating dielectric separation.

Stack-up design began with a blank sheet, and needed to be finalised long before any conductor routing was contemplated. Trace mapping gave a guide to the understanding of the availability of space and the density of tracking practicable and depth-of-complexity was a way of measuring initial layer requirement. The cost could then be estimated and the actual layout started, with periodic checking simulations to ensure good signal integrity.

In Cotton’s actual example, once the layout was complete, post-layout simulation revealed signal integrity issue with 90 of the total of 2,000 differential pairs in the design. There were two options: Fix them by reviewing them individually, which would take time and effort, or by incorporating six additional layers, which would save time but significantly increase unit cost and have additional consequences on mechanical details. Cotton’s experience was that most design managers would never allow the time to fix the problem properly, but, in this instance, he had stood his ground and insisted the designer be given sufficient time to clean up all the differential pair conflicts and realise the original design objective and unit cost. “Spend the time up-front. Design once, make many times!”

Final session of the day, on a theme of novel technologies, was moderated by Pete Starkey, technical editor with I-Connect007.

The first presentation was in two parts. Dr. Ulrich Prinz, from Enthone, and Arne Schnoor, from LPKF Laser and Electronics, both based in Germany, reviewed recent develoments for plating laser direct structured serial parts and prototypes based on one-step copper technology.

Laser direct structuring techniques had become key to the successful manufacture of moulded interconnection devices, which were widely used in smartphones and tablets as antenna components. A significant part of the cost of these components was in the metallisation process, and Dr. Prinz described an improvement in electroless copper deposition technology which offered significant cost reduction. A pre-seeded ABS was generally used for the antenna mouldings and because this was only weakly catalytic after laser structuring, a very active electroless copper strike-bath formulation was necessary to achieve satisfactory initial coverage before transferring the work into a more stable chemistry to build up the thickness to 15 to 20 microns. Because of its high activity, the strike bath was operating at the limit of its stability and needed to be changed frequently, incurring substantial disposal costs.

There had been two significant areas of process development: A more flexible electroless copper formulation, capable of single-step operation, and an activating process to increase the catalytic reactivity of the precursor particles compounded into the plastic. Upon laser structuring, although these particles were uncovered within the plastic matrix, they failed to be completely converted into catalytic sites. Immersing the laser-structured moulding in the activator chemistry substantially increased the conversion so that electroless plating was more efficiently initiated and the strike bath was no longer necessary. The technology could be adapted for plastics other than ABS. Higher bath loadings and shorter plating times were possible with the new electroless chemistry, and waste treatment and water consumption were substantially reduced.

A further innovation from LPKF, described by Arne Schnoor, was a laser-direct-structurable lacquer that could be applied to parts moulded from standard plastics for purposes of rapid prototyping. And this was complemented by a very simple-to-operate electroless copper chemistry, developed in cooperation with Enthone, which enabled the concept of an in-house “laboratory in a box” to be realised. As well as rapid prototyping, this self-contained package could be used for initial evaluation of laser parameter settings and laser-direct-structurable plastics development.

Professor Martin Goosey returned to the presenters’ table, this time in his role as a technical consultant with MTG Research in the UK, and gave a fascinating account of a novel use of waste natural products for metals recovery. It was estimated that the UK shell-fish industry dumped, legally or illegally, approximately 15,000 tons of crab shells annually. And it was known that the material of which crab shells are composed, chitin, has an affinity for heavy metals. Applying some lateral thinking, it was proposed to evaluate this waste material, which is expensive to dispose of legitimately, as a substitute for ion-exchange resin in the removal of copper from metal-finishing effluent. It was observed that crab shells had the ability to absorb 250 milligrams of copper per gram of shell, and to reduce the concentration of copper in solution down to the 0.1ppm level. The activity of chitin could be increased by converting it to chitosan by a simple procedure of heating in sodium hydroxide solution. Once absorbed, it was found possible to desorb the copper into sulphuric acid and reclaim the metal by electroplating. A feasibility study had been completed, and further work was necessary to assess many variables and to optimise the chemistry.

Professor Goosey took the opportunity to review the FP7 ASPIS Project, in which EIPC is an active partner. Now in its final stages, the ASPIS Project had set out to investigate fundamental failure modes and mechanisms of ENIG coatings, to develop an ENIG screening tool, to develop improved coating methods and materials from both aqueous and ionic-liquid systems, and to verify the compatibility of the technology with assembly methods and practices. Up to date information is available at www.aspis-pcb.eu.

Professor Jan Vanfleteren from the University of Ghent in Belgium demonstrated what could be achieved by the intelligent application of established PCB fabrication and assembly concepts and techniques to the development of stretchable circuits that could be straightforwardly transferred to industrial manufacture.

The fundamental requirements he defined were that the PCB processing and assembly should be done on a flat substrate, that standard off-the-shelf components should be used, and that the overall process should follow as closely as possible an industry-typical manufacturing route.  In accordance with this concept, stretchable circuit designs consisted of a number of small rigid islands, each carrying a limited number of small components or a single large component, interconnected by meander-shaped copper conductors embedded in an elastic polymer. A lot of effort had gone into optimising the detail geometry of the meander pattern in order to maximise the mechanical reliability of conductors, particularly in the transition area between rigid and elastic elements, where a gradual transition in encapsulant thickness made an additional contribution to the durability of the interconnect.

Professor Vanfleteren described the manufacturing process for stretchable moulded interconnect (SMI). A temporary FR4 carrier was coated with a wax adhesive. Separately, a sheet of copper foil was coated with photo-definable polyimide, patterned to support the copper meanders and component islands. The two were bonded together and the copper was imaged and etched, solder mask applied to the component islands and components placed and reflow soldered with SAC alloy. The top side of the assembly was encapsulated by liquid injection moulding with a silicone or polyurethane elastic resin, then the temporary adhesive was melted to allow the assembly to be detached from the FR4 carrier and the second side was encapsulated by liquid injection moulding to give the finished SMI device.

Final presentation of the conference came from Raymond Gales, customer care and group quality director with Circuit Foil. With reference to the conference theme of “differentiation through technology” he demonstrated how a European manufacturer of copper foil had responded to the requirements of the portable communications industry with ultra-thin peelable foils as an enabler for chip-scale packaging substrates. Build-up substrates for mobile CPUs were fabricated by techniques such as modified-semi-additive-process (MSAP) and coreless build-up.

Conventional subtractive technology was limited by etching capability, and could not achieve the ultra-fine line widths demanded for chip-scale packaging. Semi-additive techniques offered a solution, provided a base foil was available that was thin enough to be flash-etched. Also, substrates clad with ultra-thin foil with a low-reflectance surface were suitable for direct CO2 laser drilling and provided a means of achieving high-end buried and blind via interconnectivity through sequential build-up. Coreless technologies in package substrates were developing to satisfy the increasing demand for smaller, lighter devices with superior electrical performance. Gales explained in detail how his company had established a customised range of peelable ultra-thin foils with functional thicknesses down to 2 microns, with carefully controlled characteristics to enable direct laser drilling and the realisation of 30 micron lines and spaces by modified semi-additive processing.

Alun Morgan brought the proceedings to a close, with special thanks to the companies who had sponsored the event, and acknowledged the contributions of the speakers and the attention of the delegates.

EIPC events consistently promote the high-level exchange of knowledge, experience and opinion, both in the formal sessions and in the many informal discussions outside the conference room. The Summer Conference was a great success, and a great credit to the behind-the-scenes work of the EIPC staff for their faultless and seamless organisation, administration and management of the event.

Author's Note: I am grateful to Alun Morgan for allowing me to use his photographs.