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Cadence Joins Intel Foundry Accelerator Design Services Alliance

03/17/2025 | Cadence Design Systems
Cadence is expanding its collaboration with Intel Foundry by officially joining the Intel Foundry Accelerator Design Services Alliance! This collaboration amplifies both companies' efforts to drive innovation, support advanced chip design, and solidify Intel Foundry as a leader in cutting-edge semiconductor solutions.

Quest Global Acquires Alpha-Numero Technology Solutions

03/14/2025 | Quest Global
Quest Global is pleased to announce the acquisition of Alpha-Numero Technology Solutions. Alpha-Numero is a US-based VLSI design company with expertise in FPGA.

Würth Elektronik Now an Infineon ‘Preferred Partner’

03/13/2025 | Wurth Elektronik eiSos
Würth Elektronik, one of the leading manufacturers of electronic and electromechanical components, is broadening its collaboration with semiconductor manufacturers.

Elementary Mr. Watson: Ensuring a Smooth Handoff From PCB Design to Fabrication

03/13/2025 | John Watson -- Column: Elementary, Mr. Watson
At the 2020 Tokyo Summer Olympics, the U.S. men's 4x100-meter relay team had high hopes of winning a medal. The team comprised some of the fastest sprinters in the world, but something went wrong. In a relay, four runners must smoothly pass their baton to the next runner inside a zone on the track. If a runner drops the baton or it’s passed outside the zone, the team risks disqualification. The U.S. team’s pass between the second and third runner was messy, slowing them down. By the time the last runner received the baton, the team had lost too much time. They finished sixth in their heat and didn’t qualify for the final.

Ventec International Group Announce Launch of VT-47LT IPC4101 /126 Prepreg for HDI

03/12/2025 | Ventec International Group
Ventec International Group announce launch of VT-47LT IPC4101 / 126 Prepreg. Are Microvia Failures Plaguing Your HDI Any Layer Designs? High-density interconnect (HDI) designs are pushing the envelope - higher layer count HDI relies on complex microvia designs: skip vias, staggered microvias, and stacked microvias in sequential laminations.
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