-
- News
- Books
Featured Books
- smt007 Magazine
Latest Issues
Current Issue
Spotlight on Mexico
Mexico isn’t just part of the electronics manufacturing conversation—it’s leading it. From growing investments to cross-border collaborations, Mexico is fast becoming the center of electronics in North America. This issue includes bilingual content, with all feature articles available in both English and Spanish.
Production Software Integration
EMS companies need advanced software systems to thrive and compete. But these systems require significant effort to integrate and deploy. What is the reality, and how can we make it easier for everyone?
Spotlight on India
We invite you on a virtual tour of India’s thriving ecosystem, guided by the Global Electronics Association’s India office staff, who share their insights into the region’s growth and opportunities.
- Articles
Article Highlights
- Columns
- Links
- Media kit
||| MENU - smt007 Magazine
Creating a Design Constraint Strategy
July 24, 2025 | I-Connect007 Editorial TeamEstimated reading time: 2 minutes
Feature Q&A With Kris Moyer, Global Electronics Association
Most designers learn how to set their design constraints through trial and error. EDA vendors’ guidelines explain how to use their particular tools’ constraints, and IPC standards offer a roadmap, but PCB designers usually develop their own unique styles for setting constraints.
Is there a set of best practices for setting constraints? That’s what I asked Global Electronics Association design instructor Kris Moyer, who covers design constraints in his classes. In this interview, Kris discusses how to identify PCB design requirements and set design constraints tightly enough for performance but flexible enough for manufacturing limitations.
What pre-layout analysis should be performed before you begin setting constraints?
Kris Moyer: There are several analyses that should be completed before setting constraints. These include the following:
- Timing/signal integrity: Used to set controlled impedance, termination, length matching and max length, and layer restrictions for digital signals.
- SPICE/power integrity analysis: Used to define the power distribution network (PDN) limits, the current requirements (trace widths), and voltage clearance requirements (Cu-Cu clearance).
- Thermal analysis: Used to determine how many plane layers, the copper weight of the plane layers, temperature rise of the traces (also used to define trace width), and any heat-sinking needed.
- Structural/mechanical analysis: This is the vibration, shock, and other environmental impacts to the design. It’s used to trade off between how many copper layers vs. board thickness for the stackup, and it is also used to evaluate the number and locations of mount holes or other support structures for the board. This analysis also leads to placement restrictions, such as specific placement of tall parts due to the design of the enclosure, or heavy/high mass parts due to special support structures designed into the housing, etc.
- Material analysis: This is an investigation of any special materials that may be needed, such as RF materials, flex materials, etc. These all have an impact on the stackup of the PCB and often lead to routing restrictions. For instance, you can only route the RF signals on the RF layers, or you have fewer routing layers available in the flex sections vs. the rigid sections of a rigid-flex board, limiting your ability to route signals from one rigid section to the next.
To continue reading this Q&A, which originally appeared in the July 2025 Design007 Magazine, click here.
Testimonial
"Advertising in PCB007 Magazine has been a great way to showcase our bare board testers to the right audience. The I-Connect007 team makes the process smooth and professional. We’re proud to be featured in such a trusted publication."
Klaus Koziol - atgSuggested Items
NEDME 2025 Draws Strong Northwest Crowd, Builds on Tradition of Regional Collaboration
10/31/2025 | NEDMEThe NW Electronics Design & Manufacturing Expo (NEDME) 2025 once again brought together the Pacific Northwest community for a full day of learning, networking, and industry connections.
Keysight Advances Quantum Engineering with New System-Level Simulation Solution
10/30/2025 | BUSINESS WIREKeysight Technologies, Inc. announced the release of Quantum System Analysis, a breakthrough Electronic Design Automation (EDA) solution that enables quantum engineers to simulate and optimize quantum systems at the system level.
WestDev Announces Advanced Thermal Analysis Integration for Pulsonix PCB Design Suite
10/29/2025 | WestDev Ltd.Pulsonix, the industry-leading PCB design software from WestDev Ltd., announced a major enhancement to its design ecosystem: a direct interface between Pulsonix and ADAM Research's TRM (Thermal Risk Management) analysis software.
Industry Veteran Dr. Helen Song Joins Celera Semiconductor to Lead Product Design
10/28/2025 | PRNewswireCelera Semiconductor, the analog industry leader using AI to automate the entire product development flow, today announced that Dr. Helen Song has joined the company as vice president of Product Design.
Mapping the EV Landscape: Markets, Platforms, and Powertrains
10/28/2025 | Stanton Rak, SF Rak Companye-Mobility is the defining transformation of 21st-century transportation. As legacy OEMs, startups, and governments race to electrify vehicle fleets, the landscape of e-Mobility is expanding into previously unimaginable territory. But with innovation comes complexity, and with complexity, a need for systems that are not only high-performing but also reliably engineered for the long haul. Understanding the diversity and scale of the EV marketplace is essential to grasping the reliability challenges ahead.