-
- News
- Books
Featured Books
- pcb007 Magazine
Latest Issues
Current IssueEngineering Economics
The real cost to manufacture a PCB encompasses everything that goes into making the product: the materials and other value-added supplies, machine and personnel costs, and most importantly, your quality. A hard look at real costs seems wholly appropriate.
Alternate Metallization Processes
Traditional electroless copper and electroless copper immersion gold have been primary PCB plating methods for decades. But alternative plating metals and processes have been introduced over the past few years as miniaturization and advanced packaging continue to develop.
Technology Roadmaps
In this issue of PCB007 Magazine, we discuss technology roadmaps and what they mean for our businesses, providing context to the all-important question: What is my company’s technology roadmap?
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - pcb007 Magazine
PCB Surface Topography and Copper Balancing Under Large Form Factor BGAs
October 1, 2024 | Neil Hubble, Akrometrix and Gary A. Brist, Intel CorporationEstimated reading time: 1 minute
Editor’s Note: This paper was originally published in the Proceedings of IPC APEX EXPO 2024.
Background
As CPU and GPU packages grow larger and contain higher pin/ball counts, the importance of managing the printed circuit board (PCB) surface coplanarity for package assembly increases. The PCB surface coplanarity under a package is a product of both the global bow/twist of the PCB and the local surface topography under the package. In general, the surface topography is dependent the choice of material and layer stackup and the interaction between the innerlayer copper patterns and prepreg resin flow.
Advances in chiplet design and heterogeneous integration solutions in electronic packaging are enabling complex packages with increasing total die areas, resulting in the need for larger CPU and GPU packages1. Based on trends and advances in package integration, it is expected that future packages exceeding 100–120 mm on a package edge will become more common. This increases the challenge of the second-level interconnect (SLI) assembly processes when attaching the package to the PCB due to the combined coplanarity and topography variations of the PCB and package. These combined influences between the PCB and package are the key drivers of SLI defects such as solder bridging or solder joint opens during PCB assembly.2,3 Figure 1 is a graphical depiction of how the global PCB warpage or curvature under the package must be smaller for larger packages to achieve the same PCB coplanarity under the package.
Figure 1: PCB coplanarity under package.
The characterization of PCB coplanarity under the package footprint has been studied historically, including influences of assembly temperatures on dynamic PCB coplanarity as the PCB and package move together through the assembly reflow temperature profile.4,5,6 Other works have shown how the choice of PCB materials, fabrication process conditions, and design each impact global PCB bow/twist and warpage7.
To continue reading this article, which originally published in the September 2024 SMT007 Magazine, click here.
Suggested Items
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
11/22/2024 | Andy Shaughnessy, I-Connect007In this week’s roundup, I’m highlighting a variety of articles. We have an interview with Jess Hollenbaugh, a recent graduate working for Polar Instruments. We also have an interview with IPC’s Matt Kelly and Devan Iyer, whose white paper may provide a way forward for companies dealing with complex advanced packages. Our newest columnist Tom Yang describes the U.S. PCB industry from the point of view of a technologist from another country, and Dan Beaulieu has a review of Malcolm Gladwell’s follow-up to The Tipping Point. Finally, we have my review of PCB Carolina, a one-day tabletop show that keeps expanding, much like my waistline after eating their catered food. Enjoy!
North American PCB Industry Sales Down 11.1% in October
11/22/2024 | IPCIPC announced today the October 2024 findings from its North American Printed Circuit Board (PCB) Statistical Program. The book-to-bill ratio stands at 1.09.
Real Time with... electronica 2024: Inside CEE PCB—Innovations in Technology
11/22/2024 | Real Time with... electronicaMarcy LaRont Interviews Tom Yang and Jerome Larez From CEE PCB. Tom and Jerome showcase the company's advancements and emphasize the importance of automation in PCB manufacturing for quality and efficiency. The CEE PCB focuses on sustainability and aims to connect with high-tech clients while exploring new partnerships for high-volume production.
Designing for Cost to Manufacture
11/21/2024 | Marcy LaRont, I-Connect007ICAPE's Richard Koensgen, a seasoned field application engineer with a rich background in PCB technology, shares his journey of working with customers and manufacturers through the intricacies of circuit board development and emphasizes the importance of early-stage collaboration with PCB designers. With a focus on tackling the most challenging aspects of PCB design and manufacturing, he discusses everything from layout considerations to the thermal challenges of today's technology when it comes to designing for cost.
PCB Design Software Market Expected to Hit $9.2B by 2031
11/21/2024 | openPRThis report provides an overview of the PCB design software market, detailing key market drivers, challenges, technological advancements, regional dynamics, and future trends. With a projected compound annual growth rate (CAGR) of 13.4% from 2024 to 2031, the market is expected to grow from USD 3.9 billion in 2024 to USD 9.2 billion by 2031.